Ovisign This page is dedicated to those who want to learn the Verilog Hardware Description Language for Digital Circuits Design and Functional Verification.

We'll discuss Verilog design and verification techniques for ASIC and FPGA.

15/01/2023

๐Ÿ”ฅ The "EASY FPGA Verilog course for beginners" is now online ๐Ÿ”ฅ
The course has 9 published projects for the complete Verilog FPGA beginner with downloadable resources.
Stay tuned because more projects are coming ๐Ÿฅณ
https://ovisign.com/easy_fpga_verilog_course/

FPGA project 09 - EASY FPGA State Machine is published! ๐Ÿ˜ŽIf you're a Verilog beginner you can implement this cool projec...
27/12/2022

FPGA project 09 - EASY FPGA State Machine is published! ๐Ÿ˜Ž
If you're a Verilog beginner you can implement this cool project on you FPGA development board.
Like & share with your friends so I can create even more tutorials. Enjoy ๐Ÿ˜

This Tutorial Shows You How To Create an EASY FPGA State Machine!At the end of this Verilog project for beginners you will be able to display the "EASY FPGA"...

Part1 of the Verilog Timer tutorial is now live! Enjoy!
19/10/2022

Part1 of the Verilog Timer tutorial is now live! Enjoy!

Part1 - Verilog tutorial and Modelsim testbenchLet's implement a Verilog Digital BCD Timer circuit! This Verilog BCD Timer can be implemented on any FPGA dev...

Part2 of the Linear Feedback Shift Register tutorial is now live! Enjoy!
07/10/2022

Part2 of the Linear Feedback Shift Register tutorial is now live! Enjoy!

Part2 - FPGA programming with Intel QuartusLet's implement an FPGA Linear Feedback Shift Register circuit using Verilog!The 16bit LFSR is used to generate ps...

It's Sunday and it's the perfect time for a new FPGA project in Verilog! ๐Ÿ˜ŽEASY FPGA Project 7 Part1: Linear Feedback Shi...
02/10/2022

It's Sunday and it's the perfect time for a new FPGA project in Verilog! ๐Ÿ˜Ž
EASY FPGA Project 7 Part1: Linear Feedback Shift Register.
Enjoy!

Part1 - Verilog tutorial and Modelsim testbenchLet's implement a 16bit Linear Feedback Shift Register (LFSR) circuit using Verilog! LFSRs are used as pseudo-...

New Verilog FPGA project for beginners! ๐Ÿ˜ŽEASY FPGA Project 6 Part1: Pushbutton counter with debounce. Enjoy!
19/09/2022

New Verilog FPGA project for beginners! ๐Ÿ˜Ž
EASY FPGA Project 6 Part1: Pushbutton counter with debounce.
Enjoy!

Part1 - Verilog tutorial and Modelsim testbenchLet's implement an FPGA Pushbutton Pulse Counter with Debounce circuit using Verilog!This practical Verilog tu...

Project 5 Part2: FPGA Blinky LED is now live.Enjoy!
05/09/2022

Project 5 Part2: FPGA Blinky LED
is now live.
Enjoy!

Part2 - FPGA programming with Intel QuartusLet's implement an FPGA blinky LED circuit using Verilog! This FPGA programming project for beginners will show yo...

New FPGA project release from the EASY FPGA course:Project 5 Part1: FPGA Blinky LED is publicly available. Enjoy!       ...
31/08/2022

New FPGA project release from the EASY FPGA course:
Project 5 Part1: FPGA Blinky LED is publicly available.
Enjoy!

Part1 - Verilog tutorial and Modelsim testbenchLet's implement an FPGA blinky LED circuit using Verilog!This practical Verilog tutorial for beginners will sh...

๐ŸŽ‰๐ŸŽ‰๐ŸŽ‰New release from our cool๐Ÿ˜Ž course:EASY FPGA: Intel(Altera) Quartus and Modelsim edition Project 4 Part1 is publicly a...
23/08/2022

๐ŸŽ‰๐ŸŽ‰๐ŸŽ‰New release from our cool๐Ÿ˜Ž course:
EASY FPGA: Intel(Altera) Quartus and Modelsim edition
Project 4 Part1 is publicly available. Enjoy!

FPGA project 04 Part1 - Hamming FPGA error detection and correctionPart1 - Verilog tutorial and Modelsim testbenchLet's implement a Hamming code Single Error...

๐ŸŽ‰๐ŸŽ‰๐ŸŽ‰New tutorial release from our free FPGA course:EASY FPGA: Intel(Altera) Quartus and Modelsim edition Project 3 Part2 ...
16/08/2022

๐ŸŽ‰๐ŸŽ‰๐ŸŽ‰New tutorial release from our free FPGA course:
EASY FPGA: Intel(Altera) Quartus and Modelsim edition
Project 3 Part2 is publicly available. Enjoy!

Part2 - FPGA programming with Intel QuartusLet's make our FPGA projects a bit more interesting by using a 7 segment display... This Verilog tutorial contains...

๐ŸŽ‰๐ŸŽ‰๐ŸŽ‰New tutorial release from our free FPGA course:EASY FPGA: Intel(Altera) Quartus and Modelsim edition Project 3 Part1 ...
15/08/2022

๐ŸŽ‰๐ŸŽ‰๐ŸŽ‰New tutorial release from our free FPGA course:
EASY FPGA: Intel(Altera) Quartus and Modelsim edition
Project 3 Part1 is publicly available. Enjoy!

Let's make our FPGA projects a bit more interesting by using a 7 segment display... This Verilog tutorial contains a parameterizable binary Nbit adder connec...

๐Ÿš€๐Ÿš€๐Ÿš€New tutorial release from our free FPGA course:EASY FPGA: Intel(Altera) Quartus and Modelsim edition Project 2 Part2 ...
12/08/2022

๐Ÿš€๐Ÿš€๐Ÿš€New tutorial release from our free FPGA course:
EASY FPGA: Intel(Altera) Quartus and Modelsim edition
Project 2 Part2 is publicly available. Enjoy!

The second easiest Verilog FPGA project... A multiplexer is a basic digital circuit used to drive one of the multiple inputs to one output by using a select ...

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