Boolean Chip Technology and Boolean Chip Laboratory

Boolean Chip Technology and Boolean Chip Laboratory SAKTHI TECHNOLOGY AND LABORATORY. Managing Director:A Sakthivel&sons
License No=UAN:TN19A0000525

*Doing research regarding advanced wireless communication combine with nano technology.

04/05/2021

Mesh analysis.

Mesh analysis.
04/05/2021

Mesh analysis.

28/12/2020

Hello to everybody.
To today innovation of the all technology to be has going without logout, to this across, we could generate technology at the mobile to transfer charge from one mobile to another mobile without charge bank, at the same time, we want generate hardware architecture into charge transfer mobile, ie, mobile battery with we want connect capacitor withdrawn we want connect inductor with output of the capacitor withdrawn we want connect IGBT(insulated gate bipolar transistor) with output of the inductor withdrawn we want connect collector of the IGBT with charge receive the mobile,to this across, transfer charge from one mobile to another mobile have this logic of the innovation.

01/10/2020

/Verilog program of the radix\

module radix_dif(
input [3:0]x,
output reg [3:0]y,[3:0]l);
always @(*)
begin
l[0]

22/09/2020

/Verilog code of eight bit decoder\

module sevensegment(
input a,b,c,en,
output reg i0,i1,i2,i3,i4,i5,i6,i7);
always @(*)
begin
case(~a & ~b & ~c & en)
4'b0001:i0

21/09/2020

/verilog code of eightbit decoder\

module eightbit_decode(
input a,b,c,en,
output reg i0,i1,i2,i3,i4,i5,i6,i7);
always@(*)
begin

case(i0

21/09/2020

/verilog code of 8bit multiplexer\

module mux_eightbit(
input a,b,c,en,
output reg i0,i1,i2,i3,i4,i5,i6,i7,y);
always @(*)
begin

case(i0

21/09/2020

/verilog code of 4:1multiplexer\

module mux(
input a,b,en,
output reg i0,i1,i2,i3,y);
always @(*)
begin

case(i0

21/09/2020

/verilog code of 4 bit decoder\

module decode(
input a,b,en,
output reg i0,i1,i2,i3);
always @(en)
begin
if(i0

module and_g( input a,b,c,d,e,f,g,h, output reg y1,y2,y3,y4,y5,y6,y);always @(*)beginif (y1
21/09/2020

module and_g(
input a,b,c,d,e,f,g,h,
output reg y1,y2,y3,y4,y5,y6,y);
always @(*)
begin

if (y1

Address

NO 1206, Periyakaiyagam(village), Theriruvelli(post), Mudukulathur(TK), Ramanathapuram(DT)
Mudukulathur
623711

Telephone

9786243488

Website

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