The opportunity to learn the ultimate IC programming language coming to an end on 10th Oct 2012....The registration for the HDLineate workshop will be closed this Wednesday... Hurry and resgister....Don't Miss this Opportunity..!!!!!
HDLineate
http://www.amrita.edu/campuses/am/ieee-hdlworkshop.php
IEEE Student Branch of Amrita Vishwa Vidyapeetham is conducting a two-day workshop on Verilog HDL on 13th and 14th October 2012
All the interested students, Please ensure that you do the fee transaction and the registration before Thursday ( 11th October 2012).
01/10/2012
Learn IC Design using Verilog HDL.. Attend HDLineate at Amrita Kollam on 13th and 14th Oct 2012...
http://www.amrita.edu/campuses/am/ieee-hdlworkshop.php
Please write us a mail to [email protected] regarding all clarifications . Even post here all your doubts ....
27/09/2012
Visit our offcial site to register:
http://www.amrita.edu/campuses/am/ieee-hdlworkshop.php
Registration is limited on first come first serve basis.
Please Ensure that each and every interested ECE student who wish to learn Verilog HDL never misses this..Please note admission is purely based on first come first server basis. Only first 60 registrations will be eligible to attend workshop..
Half Century in Likes!!! All Execoms, try your level best to give publicity for the event..
Payment Methods:
1) Demand Draft:
The DD should be taken in favour of IEEE Student Branch, Amrita Vishwa Vidyapeetham, payable at Kollam, Kerala.
A scanned copy of the should be sent to [email protected] on or before the 8th of October.
2) Bank Transfer:
Name: IEEE Student Chapter
Account Number: 005900100113630
IFSC Code: DLXB0000260
Dhanalakshmi Bank, Vallikkavu
Note: The registration fee includes food. Accommodation will be available upon request and will be charged separately.
Date Time
13th October 2012 03:00 PM -08:00 PM
14th October 2012 09:00 AM- 06:00 PM
Please note that VHDL is not an abbreviation for Verilog HDL - Verilog and VHDL are two different HDLs. They have more similarities than differences however.
What is Verilog HDL
Verilog HDL is a major hardware description language (HDL) used by hardware design professionals, particularly in the semiconductor and electronic design industry. It was introduced in 1985 by Gateway Design System Corporation. Verilog HDL enables designers to develop designs with a high level of abstraction in the design, verification and implementation of digital logic chips. A knowledge of the C programming language is helpful in learning Verilog HDL.
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Amrita School Of Engineering, Amritapuri
Kollam
690525