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An official page for www.vlsiencyclopedia.com VLSI stands for "Very Large Scale Integration".

This is the field which involves packing more and more logic devices into smaller and smaller areas. This Page iis all about the technology called Very Large Scale Integration. The main intention of this blog is to cover all the topics about VLSI. Highlight about all the terminologies, with the proper diagrams, circuits, basic concepts which can be easily understood to all level
We have a team hav

ing lot of interest in this subject and our intention is to cover all the contents of this subject and provide the readers a complete knowledge of VLSI. For more details please visit our website www.vlsiencyclopedia.com

VHDL Tutorial - www.vhdltutorial.blogspot.com
Verilog Tutorial- www.verilogtutorial.blogspot.com

Excited by the form factor innovation happening in the industry. Our partners at Lenovo launched the lightest ThinkPad e...
30/09/2020

Excited by the form factor innovation happening in the industry. Our partners at Lenovo launched the lightest ThinkPad ever — powered by 11th Gen Intel Core — and the world's FIRST foldable PC.

Lenovo™ unveils the latest addition to our premium X1 portfolio, ThinkPad™ X1 Nano. The lightest ThinkPad breaks new ground for performance and functionality in an incredibly featherweight package.

03/04/2020

COVID-19 lockdown !!

Invest time to look at some basics.

SystemVerilog Event Regions, Race Avoidance & Guidelines

03/04/2020

Quiz of the day!!
The following switching functions are to be implemented using a decoder:
f1 = ∑m(1, 2, 4, 8, 10, 14) f2 = ∑m(2, 5, 9, 11) f3 = ∑m(2, 4, 5, 6, 7)
The minimum configuration of decoder will be __________
a) 2 to 4 line
b) 3 to 8 line
c) 4 to 16 line
d) 5 to 32 line

Submit your answer with explanation if possible.

02/04/2020

COVID-19 Lockdown! A good paper to read.
SystemVerilog - Is This The Merging of Verilog & VHDL?

http://www.sunburst-design.com/papers/CummingsSNUG2003Boston_SystemVerilog_VHDL.pdf

Feel free to post any comments or questions you have.

02/04/2020

Quiz of the day.!!
A single transistor can be used to build which of the following digital logic gates?
a) AND gates
b) OR gates
c) NOT gates
d) NAND gates
Post your answers with explanation. Final answer will be explained at end of the day.

25/06/2019

Question of the day by Kumar Layek

Q: A, B, C are the inputs to a FULL ADDER, if the value of the SUM = C' (i.e C complement), then what will be the value of CARRY = ???

Low power design techniques. Useful for the designers who will be working on IoT SoC's. Future posts will cover more on ...
25/06/2019

Low power design techniques. Useful for the designers who will be working on IoT SoC's. Future posts will cover more on UPF and low power verification techniques. Please comment if you need detailed post on any relate topic.

In today's IOT (Internet Of Things) world there are various wearable/Portable smart devices coming up in the market which are battery operated. These devices also need to be Power efficient such that it can run on battery for a long time. And here the concept of Low Power Design comes into existence...

RIP Professor Stephen Hawking. You will be always remembered for your incredible contribution in physics.
14/03/2018

RIP Professor Stephen Hawking. You will be always remembered for your incredible contribution in physics.

18/11/2017

Isn't it amazing !!

05/11/2017

So True

27/03/2017

UVM Interview Questions - 5
What is virtual sequencer and virtual sequence in UVM?
How set_config_* works?
What are the advantages of uvm RAL model ?
What are the different override types?
Explain end of simulation in UVM?

System Verilog UVM Interview Questions. Interview Question related to UVM and OVM methodology with answers.

Online paper submissions are now open for the 2017 Symposia on VLSI Technology and Circuits, to be held at the Rihga Roy...
16/01/2017

Online paper submissions are now open for the 2017 Symposia on VLSI Technology and Circuits, to be held at the Rihga Royal Hotel in Kyoto, Japan from June 5 – 8, 2017. In a departure from previous years, both Symposia (VLSI Technology and VLSI Circuits) will be held on a fully overlapping schedule from June 6 – 8, preceded by Short Courses on June 5.

The deadline for paper submissions to both Symposia is January 23, 2017. Complete details for paper submission can be found online at: http://vlsisymposium.org/authors.html

VLSI Symposia 2017 on VLSI Technology and Circuits to be held at Kyoto, Japan from June 5 to 8, 2017.

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