SLAB - VLSI Professional Training of Bangladesh

SLAB - VLSI Professional Training of Bangladesh

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SLAB – VLSI Professional Training-Online Platform-Hands-On Analog Design & IC Layout Training for Entry-Level Engineers.

Learn core Analog and Digital Circuits, Cadence Virtuoso simulations, and Layout fundamentals to build industry-ready skills.

04/26/2026

👉Potential Interview Tips

1. BASIC ELECTRONICS
==============================
- What is voltage, current, resistance?
- Explain Ohm’s Law
- Passive vs active components
- Linear vs non-linear elements
- What is impedance?
- Difference between AC and DC
==============================
2. CIRCUIT ANALYSIS
==============================
- What is KCL and KVL?
- Node vs mesh analysis
- Superposition theorem
- Thevenin theorem
- Time constant (RC, RL)
- First-order vs second-order circuits
==============================
3. SEMICONDUCTOR PHYSICS
==============================
- What is semiconductor?
- Doping (n-type, p-type)
- Mobility
- Drift vs diffusion current
- PN junction operation
- Depletion region
- Junction capacitance

==============================
4. DIODES
==============================
- Diode I-V characteristics
- Forward vs reverse bias
- Zener diode
- Breakdown (Zener vs avalanche)
- Applications (rectifier, regulator)

==============================
5. MOSFET (CORE AREA)
==============================
- What is MOSFET?
- NMOS vs PMOS
-FinFet
- Regions of operation
- Threshold voltage
- Body effect
- Channel length modulation
- Subthreshold conduction
- Strong vs weak inversion
- What is overdrive voltage?
- Drain current equations (conceptual)
- Why saturation region is used?
- Short channel effects (basic idea)

==============================
6. ANALOG AMPLIFIERS
==============================
- What is amplifier?
- Voltage gain, current gain
- What is Op-Amp?
- Ideal vs non-ideal Op-Amp
- Inverting vs non-inverting
- Input/output impedance
- Slew rate
- Offset voltage
- Noise (basic idea)

==============================
7. DIFFERENTIAL PAIR
==============================
- What is differential pair?
- Differential vs common-mode signal
- Tail current source
- CMRR
- Input common-mode range
- Output swing
- Sources of offset
- Effect of mismatch
- Why differential structure preferred?

==============================
8. CURRENT MIRRORS
==============================
- What is current mirror?
- Simple current mirror
- Cascode current mirror
- Wilson current mirror (optional)
- What is current mismatch?
- Output resistance
- Accuracy limitations
- Temperature effects

==============================
9. CASCODE & GAIN BOOSTING
==============================
- What is cascode?
- Why cascode is used?
- Output resistance improvement
- Gain boosting concept (basic)
- Tradeoff: gain vs headroom
- Wide-swing cascode (basic idea)

==============================
10. ANALOG DESIGN METRICS
==============================
- What is gain?
- What is gm?
- What is ro?
- Gain formula concept
- Bandwidth
- Gain-bandwidth product
- Power vs performance tradeoff
- Noise vs power tradeoff

==============================
11. FREQUENCY RESPONSE
==============================
- What is bandwidth?
- What is pole and zero?
- Dominant pole
- Bode plot (basic idea)
- Unity gain frequency
- Compensation (basic)

==============================
12. FEEDBACK & STABILITY
==============================
- What is feedback?
- Negative vs positive feedback
- Benefits of feedback
- Stability concept
- Phase margin
- Gain margin
- What is oscillation?

==============================
13. ANALOG BUILDING BLOCKS
==============================
- What is OTA?
- What is LDO?
- What is bandgap/reference circuit?
- What is VCO?
- What is PLL (basic)?
- What is ADC/DAC (basic)?
- Current source vs voltage source

==============================
14. VLSI DESIGN FLOW
==============================
- What is VLSI?
- IC design flow steps
- Schematic → Layout → Verification
- Frontend vs backend
- Analog vs digital flow difference

==============================
15. IC LAYOUT (VERY IMPORTANT)
==============================
- What is layout?
- Why layout is critical?
- Matching concept
- Symmetry
- Common centroid
- Interdigitation
- Dummy devices
- Guard ring
- Shielding
- Routing basics
- Device orientation
- What is floorplanning?

==============================
16. PARASITICS
==============================
- What are parasitics?
- Parasitic capacitance types
- Resistance parasitics
- Coupling capacitance
- Effect on speed and gain
- How to reduce parasitics?

==============================
17. PROCESS & TECHNOLOGY
==============================
- What is CMOS technology?
- Node (e.g., 180nm, 65nm)
- Process variations (corner: TT, SS, FF)
- What is PVT variation?

==============================
18. DRC / LVS / EXTRACTION
==============================
- What is DRC?
- What is LVS?
- What is ERC?
- What is parasitic extraction?
- Why post-layout simulation needed?

==============================
19. RELIABILITY & PRACTICAL
==============================
- What is ESD?
- What is latch-up?
- What is electromigration?
- Temperature effects on circuits
- Power consumption issues

==============================
20. HR / MOTIVATION
==============================
- Why this course?
- Why VLSI?
- Why analog over software?
- Career goal?
- Strengths and weaknesses
- Time commitment
- Willingness to work hard?

==============================
21. PRACTICAL THINKING
==============================
- Why matching is important?
- What happens if mismatch increases?
- Why analog layout is difficult?
- Why power matters in IC design?
- Tradeoff between speed, power, area
- What happens if supply voltage reduces?
- Why scaling is challenging?

==============================
22. BONUS (FOR STRONG STUDENTS)
==============================
- What is slew rate limitation?
- What is input-referred offset?
- What is PSRR?
- What is noise margin?
- What is flicker noise?
- What is thermal noise?
- What is dynamic range?

Mixed Signal IC Design and Layout_Spring 2026 04/26/2026

👉Potential Interview Tips

1. BASIC ELECTRONICS
==============================
- What is voltage, current, resistance?
- Explain Ohm’s Law
- Passive vs active components
- Linear vs non-linear elements
- What is impedance?
- Difference between AC and DC
==============================
2. CIRCUIT ANALYSIS
==============================
- What is KCL and KVL?
- Node vs mesh analysis
- Superposition theorem
- Thevenin theorem
- Time constant (RC, RL)
- First-order vs second-order circuits
==============================
3. SEMICONDUCTOR PHYSICS
==============================
- What is semiconductor?
- Doping (n-type, p-type)
- Mobility
- Drift vs diffusion current
- PN junction operation
- Depletion region
- Junction capacitance

==============================
4. DIODES
==============================
- Diode I-V characteristics
- Forward vs reverse bias
- Zener diode
- Breakdown (Zener vs avalanche)
- Applications (rectifier, regulator)

==============================
5. MOSFET (CORE AREA)
==============================
- What is MOSFET?
- NMOS vs PMOS
-FinFet
- Regions of operation
- Threshold voltage
- Body effect
- Channel length modulation
- Subthreshold conduction
- Strong vs weak inversion
- What is overdrive voltage?
- Drain current equations (conceptual)
- Why saturation region is used?
- Short channel effects (basic idea)

==============================
6. ANALOG AMPLIFIERS
==============================
- What is amplifier?
- Voltage gain, current gain
- What is Op-Amp?
- Ideal vs non-ideal Op-Amp
- Inverting vs non-inverting
- Input/output impedance
- Slew rate
- Offset voltage
- Noise (basic idea)

==============================
7. DIFFERENTIAL PAIR
==============================
- What is differential pair?
- Differential vs common-mode signal
- Tail current source
- CMRR
- Input common-mode range
- Output swing
- Sources of offset
- Effect of mismatch
- Why differential structure preferred?

==============================
8. CURRENT MIRRORS
==============================
- What is current mirror?
- Simple current mirror
- Cascode current mirror
- Wilson current mirror (optional)
- What is current mismatch?
- Output resistance
- Accuracy limitations
- Temperature effects

==============================
9. CASCODE & GAIN BOOSTING
==============================
- What is cascode?
- Why cascode is used?
- Output resistance improvement
- Gain boosting concept (basic)
- Tradeoff: gain vs headroom
- Wide-swing cascode (basic idea)

==============================
10. ANALOG DESIGN METRICS
==============================
- What is gain?
- What is gm?
- What is ro?
- Gain formula concept
- Bandwidth
- Gain-bandwidth product
- Power vs performance tradeoff
- Noise vs power tradeoff

==============================
11. FREQUENCY RESPONSE
==============================
- What is bandwidth?
- What is pole and zero?
- Dominant pole
- Bode plot (basic idea)
- Unity gain frequency
- Compensation (basic)

==============================
12. FEEDBACK & STABILITY
==============================
- What is feedback?
- Negative vs positive feedback
- Benefits of feedback
- Stability concept
- Phase margin
- Gain margin
- What is oscillation?

==============================
13. ANALOG BUILDING BLOCKS
==============================
- What is OTA?
- What is LDO?
- What is bandgap/reference circuit?
- What is VCO?
- What is PLL (basic)?
- What is ADC/DAC (basic)?
- Current source vs voltage source

==============================
14. VLSI DESIGN FLOW
==============================
- What is VLSI?
- IC design flow steps
- Schematic → Layout → Verification
- Frontend vs backend
- Analog vs digital flow difference

==============================
15. IC LAYOUT (VERY IMPORTANT)
==============================
- What is layout?
- Why layout is critical?
- Matching concept
- Symmetry
- Common centroid
- Interdigitation
- Dummy devices
- Guard ring
- Shielding
- Routing basics
- Device orientation
- What is floorplanning?

==============================
16. PARASITICS
==============================
- What are parasitics?
- Parasitic capacitance types
- Resistance parasitics
- Coupling capacitance
- Effect on speed and gain
- How to reduce parasitics?

==============================
17. PROCESS & TECHNOLOGY
==============================
- What is CMOS technology?
- Node (e.g., 180nm, 65nm)
- Process variations (corner: TT, SS, FF)
- What is PVT variation?

==============================
18. DRC / LVS / EXTRACTION
==============================
- What is DRC?
- What is LVS?
- What is ERC?
- What is parasitic extraction?
- Why post-layout simulation needed?

==============================
19. RELIABILITY & PRACTICAL
==============================
- What is ESD?
- What is latch-up?
- What is electromigration?
- Temperature effects on circuits
- Power consumption issues

==============================
20. HR / MOTIVATION
==============================
- Why this course?
- Why VLSI?
- Why analog over software?
- Career goal?
- Strengths and weaknesses
- Time commitment
- Willingness to work hard?

==============================
21. PRACTICAL THINKING
==============================
- Why matching is important?
- What happens if mismatch increases?
- Why analog layout is difficult?
- Why power matters in IC design?
- Tradeoff between speed, power, area
- What happens if supply voltage reduces?
- Why scaling is challenging?

==============================
22. BONUS (FOR STRONG STUDENTS)
==============================
- What is slew rate limitation?
- What is input-referred offset?
- What is PSRR?
- What is noise margin?
- What is flicker noise?
- What is thermal noise?
- What is dynamic range?

Mixed Signal IC Design and Layout_Spring 2026 Fill up to confirm your slot for Viva. You will be contacted very soon.

Mixed Signal IC Design and Layout_Spring 2026 04/18/2026

📢 Calling All Future VLSI Engineers! 🚀

The global semiconductor & VLSI industry is booming, and Bangladesh is rapidly stepping into this exciting future! Our country is building world-class design talent and aiming to train thousands of engineers in chip design and related fields — creating opportunities not only locally but also on the global stage. 🇧🇩💡

🎯 We Want Your Opinion!
To help shape future training programs that truly match industry needs, we’re seeking your input on the areas you find most valuable.

👉 Which domains excite you the most and should be prioritized in future training?

✅ Design Verification
✅ IC Analog Layout Design
✅ Physical Design (PD)
✅ Basic VLSI Design

Your feedback will help us prioritize topics for upcoming training, workshops, and career support!

📋 Please use the Google Form, where you can submit your choices easily. Your response matters!

https://forms.gle/VwfCzvrrqAt4CeS87

📈 Why Your Opinion Matters:
🔹 Bangladesh aims to expand its semiconductor design workforce and boost export potential to reach a USD 1 billion industry by 2030.
🔹 VLSI and chip design skills are at the heart of technologies like AI, IoT, and 5G — and demand for trained engineers is increasing worldwide.
🔹 Strong training now means you’re equipped for tomorrow’s high-impact roles!

Let’s shape the future of VLSI together!

Mixed Signal IC Design and Layout_Spring 2026 Fill up to confirm your slot for Viva. You will be contacted very soon.

Mixed Signal IC Design and Layout_Spring 2026 04/03/2026

🚀 Launch Your Career in the Semiconductor Industry!
💡 Admission Open – Professional VLSI Training (Mixed Signal IC Design and Layout)

Are you ready to step into the world of chip design & VLSI engineering?
This is your opportunity to gain industry-level skills and become job-ready in one of the fastest-growing tech sectors.

🎯 What You Will Learn
✔ Basic to Advanced Critical Analog Blocks such as OTA, CM, Reference Circuit, LDO, VCO, PLL, A/D converter,
✔ Analog Schematic Design
✔ Industry Standard Analog Layout Techniques.
✔ Circuit Simulation & Analysis
✔ Industry Verification: AC, DC, Noise, Parametric, Stability,
DRC, LVS
✔ Parasitic Extraction Techniques

🔥 Why Join This Program?
✅ Hands-on, industry-focused training
✅ Learn tools & skills used in real chip design
✅ Opportunity to work with industry experts
✅ 100% Refundable Course Fee (After Job Placement*)

📅 Class Details
🗓 Start Date: 30 April 2026
🕘 Schedule: Fri, Sat & Sun | 3:00 PM – 6:00 PM
⏳ Duration: 3 Months (108 Contact Hours)

🎓 Eligibility
✔ Bachelor’s in EEE / ETE / ECE / CSE / Applied Physics
✔ Basic knowledge of VLSI or Analog Circuits
✔ Must pass a VIVA for admission

💰 Course Fee
BDT 20,000 (Fully refundable upon successful course completion and placement in our partner companies)

📢 Secure Your Spot Now! (Limited Seats!)
📅 VIVA Booking Deadline: 25 April 2026
🔗 Register here: Only register if you are genuinely interested!
👉 https://forms.gle/UHYp8T1SvAUjSu4M7

🌟 This course is not designed to create Cadence users - it is designed to create engineers who can think, justify, and deliver circuits in real silicon.

🌟 Don’t just learn technology — build the future with VLSI Training Academy.

Mixed Signal IC Design and Layout_Spring 2026 Fill up to confirm your slot for Viva. You will be contacted very soon.

03/18/2026

🚀 I’ll be conducting training on **IC Analog Layout Design**!

If you’re interested in building a strong career in VLSI and learning practical layout skills (matching, common centroid, routing, etc.), this is a great opportunity.

👉 If you want this topic to be prioritized, please select **IC Analog Layout Design** in the form or inform VTA directly.

Let’s build strong fundamentals and real industry-ready skills together!

02/04/2026

Studying engineering and working in a global engineering company are completely different worlds.
Competitive deadlines replace exam dates.
Meetings happen at awkward hours with teams across different continents.
Regular updates, follow-ups, and coordination become part of daily life.
Work doesn’t end when the laptop closes—your mind keeps running.
Life starts moving fast, sometimes too fast.
This phase teaches discipline, patience, and balance more than any textbook ever could.

01/17/2026

Learn Common-Source Amp Limitations & How Active Loads Solve Them | Small-Signal Analysis | Gain Formula

-See step-by-step how to calculate input/output resistance and small-signal gain

-Understand the practical limitations of R loads and why active loads improve performance

01/17/2026

CDR (Clock and Data Recovery) হলো high-speed communication system-এর এমন একটি অত্যন্ত গুরুত্বপূর্ণ block, যেটা incoming serial data stream থেকেই clock recover করে নেয়—কারণ SERDES বা multi-Gbps high-speed link-এ আলাদা করে clock পাঠানো হয় না। আলাদা clock পাঠালে skew, noise এবং routing complexity অনেক বেড়ে যায়।

Transmitter থেকে আসা data-র transition (0→1 বা 1→0) ব্যবহার করে CDR একটি closed feedback loop তৈরি করে। এই loop-এর ভেতরে থাকে Phase Detector, Loop Filter এবং VCO (বা DCO)। Phase detector incoming data transition আর locally generated clock-এর phase compare করে error বের করে, loop filter সেই error smooth করে, আর VCO clock-এর frequency/phase adjust করে। এভাবে clock ধীরে ধীরে data-র সাথে lock হয়ে যায়।

এই recovered clock দিয়েই receiver data sample করে। Sampling যদি ঠিক মাঝখানে না হয়, তাহলে সামান্য jitter, ISI বা channel distortion থাকলেই eye diagram close হয়ে যায় এবং bit error তৈরি হয়। তাই CDR আসলে শুধু clock recover করে না—এটা data integrity নিশ্চিত করে।

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